The present invention relates generally to DC balanced encoding methods and systems for serial data streams and, more particularly, to a DC balanced single bit manipulation encoding method and system for serial data streams.
Serial interconnect has become the industry standard for systems having large bandwidth requirements. Serial interconnect has been chosen over shared bus architectures in many cases because of the scalability, physical reach, pin efficiency, and flexibility associated with serial interconnect. Unfortunately, some of the desirable characteristics of shared bus, such as low latency, are lost when using serial interconnect in place of shared bus.
In order to provide the lowest possible latency, it is advantageous to keep the size of a data word as short as possible. When considering the latency of a serial data connection a number of factors are taken into account. The length of the data word is one factor.
The 8b/10b coding scheme used in fibre channel, Gigabit Ethernet, and other communication schemes uses 8 bits of data which are translated to 10 bits of code resulting in a 10 bit data word. The extra 2 bits of code enable the 8b/10b code to be DC balanced. Because the data word is the least number of bits that can be recognized/decoded, a receiver waits until all of the bits for a particular data word are received before the receiver can react to the data. Consequently, latency is proportional to the flight time and the amount of time needed to receive the data word. In the situation where one bit of information is useful to transmit, such as in control functions, a code that could provide single bit data words (single bit manipulation) will also provide minimal latency.
Generally, it is desirable to have a DC balanced coding scheme for serial data transmission. A DC balanced coding scheme has a constant DC value which allows the transmitter and the receiver to not be DC coupled.
Accordingly, it is an object of the present invention to provide a DC balanced single bit manipulation encoding method and system for serial data streams.
It is another object of the present invention to provide a DC balanced single bit manipulation encoding method and system using a three state pulse width modulation code for serial data streams.
It is a further object of the present invention to a DC balanced single bit manipulation encoding method and system using a self clocking three state pulse width modulation code for serial data streams.
In carrying out the above objects and other objects, the present invention provides a method for encoding a serial data stream having a plurality of low and high bits. The method includes generating a pulse stream. The pulse stream includes a series of pulses each having a nominal time duration. A pulse of the pulse stream is modified to have a time duration longer than the nominal time duration to encode a transition of the data stream from a low bit to a high bit. A pulse of the pulse stream is modified to have a time duration shorter than the nominal time duration to encode a transition of the data stream from a high bit to a low bit. The time duration of a pulse of the pulse stream is maintained at the nominal time duration to encode two sequential high bits of the data stream. The time duration of a pulse of the pulse stream is maintained at the nominal time duration to encode two sequential low bits of the data stream.
In carrying out the above objects and other objects, the present invention provides a serial bus system having a serial interconnect and a plurality of elements connected in a serial loop through the serial interconnect. The system further has an encoder for encoding a serial data stream to be transferred from element to element along the serial loop. The serial data stream includes a plurality of low and high data bits. The encoder is operable to generate a pulse stream. The pulse stream includes a series of pulses each having a nominal time duration. The encoder is further operable to modify a pulse of the pulse stream to have a time duration longer than the nominal time duration to encode a transition of the data stream from a low bit to a high bit and to modify a pulse of the pulse stream to have a time duration shorter than the nominal time duration to encode a transition of the data stream from a high bit to a low bit. The encoder is further operable to maintain the time duration of a pulse of the pulse stream at the nominal time duration to encode two sequential high bits of the data stream and to maintain the time duration of a pulse of the pulse stream at the nominal time duration to encode two sequential low bits of the data stream.